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1. product profile 1.1 general description the BLM7G24S-30BG is a 2-stage power mmic using nxp?s state of the art gen7 ldmos technology. this device is perfectly suited as general purpose driver in the frequency range from 2100 mhz to 2400 mhz. available in gull wing. 1.2 features and benefits ? integrated temperature compensated bias ? biasing of individual stages is externally accessible ? integrated current sense ? integrated esd protection ? excellent thermal stability ? high power gain ? on-chip matching for ease of use (input matched to 50 ? ; output partially matched) ? designed for broadband operation (frequency 2100 mhz to 2400 mhz) ? compliant to directive 2002/ 95/ec, regarding restriction of hazardous substances (rohs) 1.3 applications rf power mmic for w-cdma base stations in the 2100 mhz to 2400 mhz frequency range. BLM7G24S-30BG ldmos 2-stage power mmic rev. 1 ? 4 november 2013 product data sheet table 1. application performance typical rf performance at t case = 25 ? c; i dq1 = 75 ma; i dq2 = 233 ma. test signal: 3gpp test model 1; 64 dpch; clipping at 46 %; par = 8.4 db at 0.01% probability on ccdf per carrier; carrier spacing = 5 mhz; unle ss otherwise specified in a class-ab application circuit. test signal f v ds p l(av) g p ? d acpr (mhz) (v) (w) (db) (%) (dbc) 2-carrier w-cdma 2140 28 1.6 31.5 11.3 ? 43 2-carrier w-cdma 2350 28 1.6 29.3 10.7 ? 42
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 2 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 2. pinning information 2.1 pinning 2.2 pin description transparent top view the exposed backside of the package is the ground terminal of the device. fig 1. pin configuration ddd 9 '6$ qf 9 *66$ qf 9 '66$ 5)b287b$9 '6$ qf qf 5)b,1b$ qf 9 *66$ qf 9 '66$ qf qf qf slqlqgh[ table 2. pin description symbol pin description v ds(a1) 1 drain-source voltage of stage a1 v gss(a2) 2 gate sense fet and gate source voltage of stage a2 v dss(a2) 3 drain sense fet source voltage of stage a2 rf_in_a 4 rf input path a v gss(a1) 5 gate sense fet and gate source voltage of stage a1 v dss(a1) 6 drain sense fet source voltage of stage a1 n.c. 7 not connected n.c. 8 not connected n.c. 9 not connected n.c. 10 not connected n.c. 11 not connected n.c. 12 not connected n.c. 13 not connected n.c. 14 not connected
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 3 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 3. ordering information 4. block diagram 5. limiting values [1] continuous use at maximum temperature will affect the mttf. n.c. 15 not connected rf_out_a/v ds(a2) 16 rf output path a / drain source voltage of stage a2 gnd flange rf ground table 2. pin description ?continued symbol pin description table 3. ordering information type number package name description version BLM7G24S-30BG hsop16 plastic, heatsink small outline package; 16 leads sot1212-1 fig 2. block diagram of BLM7G24S-30BG ddd 9 '6$ qf 9 *66$ qf 9 '66$ 5)b287b$9 '6$ qf qf 5)b,1b$ qf 7(03(5$785( &203(16$7('%,$6 9 *66$ qf 9 '66$ qf table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v ds drain-source voltage - 65 v v gs gate-source voltage ? 0.5 +13 v v gs(sense) sense gate-source voltage ? 0.5 +9 v t stg storage temperature ? 65 +150 ?c t j junction temperature [1] -225 ?c t case case temperature - 150 ?c
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 4 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 6. thermal characteristics [1] when operated with a cw signal. 7. characteristics table 5. thermal characteristics measured for total device. symbol parameter conditions value unit r th(j-c) thermal resistance from junction to case final stage; t case =90 ? c; p l =1.6w [1] 2.2 k/w driver stage; t case =90 ? c; p l =1.6w [1] 6.4 k/w table 6. dc characteristics t case = 25 ? c unless otherwise specified. symbol parameter conditions min typ max unit final stage v (br)dss drain-source breakdown voltage v gs =0v; i d =0.422ma 65 - - v v gs(th) gate-source threshold voltage v ds = 10 v; i d = 42 ma 1.5 1.9 2.3 v v gsq gate-source quiescent voltage v ds = 28 v; i d = 253 ma 1.7 2.1 2.5 v i dss drain leakage current v gs =0v; v ds =28v - - 1.4 ? a i dsx drain cut-off current v gs =v gs(th) + 3.75 v; v ds = 10 v -7.8- a i gss gate leakage current v gs =11v; v ds = 0 v - - 140 na g fs forward transconductance v ds =10v; i d = 1478 ma - 2.85 - s r ds(on) drain-source on-state resistance v gs =v gs(th) + 3.75 v; i d =1.48a - 350 - m ? i dq quiescent drain current main transistor: v ds =28v sense transistor: i d =7ma; v ds =28v 208 233 257 ma driver stage v (br)dss drain-source breakdown voltage v gs =0v; i d =0.116ma 65 - - v v gs(th) gate-source threshold voltage v ds = 10 v; i d = 11.6 ma 1.5 1.9 2.3 v v gsq gate-source quiescent voltage v ds = 28 v; i d = 69.6 ma 1.7 2.1 2.5 v i dss drain leakage current v gs =0v; v ds =28v - - 1.4 ? a i dsx drain cut-off current v gs =v gs(th) + 3.75 v; v ds = 10 v -2.2- a i gss gate leakage current v gs =11v; v ds = 0 v - - 140 na g fs forward transconductance v ds =10v; i d = 406 ma - 0.8 - s r ds(on) drain-source on-state resistance v gs =v gs(th) + 3.75 v; i d = 0.4 a - 2350 - m ? i dq quiescent drain current main transistor: v ds =28v sense transistor: i d =7ma; v ds =28v 67 75 83 ma
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 5 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8. application information 8.1 circuit information for appli cation circuit (2.1 ghz to 2.2 ghz) table 7. rf characteristics typical rf performance at t case = 25 ? c; v ds = 28 v; i dq1 = 75 ma; i dq2 = 233 ma. test signal: 2-carrier w-cdma; 3gpp test model 1; 64 dpch; clipping at 46 %; par = 8.4 db at 0.01% probability on ccdf per carrier; carrier spacing = 5 mhz; f 1 =2112.5mhz; f 2 = 2117.5 mhz; f 3 = 2162.5 mhz; f 4 = 2167.5 mhz; unless otherwise specifie d measured in a class-ab production circuit. symbol parameter conditions min typ max unit g p power gain p l(av) = 1.6 w 29.5 31.5 33.5 db ? d drain efficiency p l(av) = 1.6 w 10 11.3 - % rl in input return loss p l(av) = 1.6 w - ? 17 ? 10 db acpr adjacent channel power ratio p l(av) = 1.6 w - ? 43 ? 40 dbc table 8. list of components for test circuit see figure 3 . component description value remarks c1, c4, c100, c200 capacitor 10 ? f c2, c5, c6, capacitor 1 ? f c3, c7, c10 capacitor 8.2 pf [1] c8 capacitor 1.6 pf [1] c9 capacitor 0.4 pf [1] c11 electrolytic capacitor 470 ? f c101, c201 capacitor 100 nf c102, c103, c105, c202, c203, c205 capacitor 12 pf [2] c104, c204 capacitor 4.7 ? f c21, c22, c23, c24, c25, c26, c27, c28, c29, c30, c31, c300, c301, c302, c303, c304, c305, c400, c401, c402, c403, c404, c405 capacitor - not mounted d100, d200 ic: lm4051 - d300, d400 ic - not mounted p100 potentiometer - do not populate p400 potentiometer - not mounted q100, q200 ic - lm7341 q300, q400 ic - not mounted r1 ferrite bead - r100, r200 resistor 4.7 ? r101, r108, r110, r208 resistor 0 ? r102 resistor 360 ? 1% tolerance r103 resistor 330 ? 1% tolerance r104, r203 resistor 68 k ? r105 resistor 10 k ?
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 6 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic [1] american technical ce ramics type 100b or capacitor of same quality. [2] american technical ce ramics type 100a or capacitor of same quality. r106, r205 resistor 820 ? r107, r206 resistor 47 ? r109, r209 resistor 300 k ? r201 resistor 180 ? 1% tolerance r202 resistor 3.6 k ? 1% tolerance r204 resistor 9.1 k ? r207 resistor 1 k ? r21, r300, r301, r302, r303, r304, r305, r306, r307, r308, r309, r400, r401, r402, r403, r404, r405, r406, r407, r408, r409 resistor - not mounted table 8. list of components ?continued for test circuit see figure 3 . component description value remarks
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 7 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic printed-circuit board (pcb): rogers 4350; thickness = 0.762 mm. see table 8 for a list of components. fig 3. component layout for class-ab applicat ion circuit with auto -bias (a halve section of the bl m7g22s-60pbg [section a] is us ed for characterization) ddd 9 *66% 9 '6% 9 eldv% 9 eldv% 9 eldv$ 9 eldv$ 9 '6$ 5 3 5 5 5 & 5 & 5 5 5 4 5 ' & 5 & & *1' *1' & & & 5 5 5 5 & & & 5 5 & 5 5 5 5 4 ' 5 5 5 5 & & & 5 & & 5 & 5 5 5 ' 5 5 5 5 & 5 & & 9gv% *1' *1' *1' & & 5 5 5 5 5 & ' 4 & 5 5 5 & & 5 5 3 & & & & & & & & & & & %/0*63%* 0+] 52plo 9 '66% 9 *66% 9 *66$ 9 *66$ 9 '66$ 9 '66% 9 '66$ 9gv$ & & & & & & & & 4 5 3 5 5 5 & 5 & 5 5 5 4 5 ' & 5 & & *1' *1' & & & 5 5 5 5 & & & 5 5 & 5 5 5 5 4 ' 5 5 5 5 & & & 5 & & 5 & 5 5 5 ' 5 5 5 5 & 5 & & 9gv% *1' *1' *1' & & 5 5 5 5 5 & ' 4 & 5 5 5 & & 5 5 3 & & & & & & & & & & & %/0*63%* 0+] 52plo 9 '66% 9 *66% 9 *66$ 9 *66$ 9 '66$ 9 '66% 9 '66$ 9gv$ & & & & & & & & 4
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 8 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.2 performance curves (2.1 ghz to 2.2 ghz) performance curves are measured in a class-ab dedicated application circuit with auto-bias from 2.1 ghz to 2.2 ghz, see ta b l e 8 and figure 3 . 8.2.1 w-cdma t case = 25 ? c; v ds = 28 v; p l(av) = 1.6 w; i dq1 = 75 ma; i dq2 = 233 ma; carrier spacing = 5 mhz. t case = 25 ? c; v ds = 28 v; p l(av) = 1.6 w; i dq1 = 75 ma; i dq2 = 233 ma; carrier spacing = 5 mhz. fig 4. power gain and drain efficiency as function of frequency; typical values fig 5. adjacent channel power ratio as a function of frequency; typical values t case = 25 ? c; v ds = 28 v; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; carrier spacing = 5 mhz. t case = 25 ? c; v ds = 28 v; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; carrier spacing = 5 mhz. fig 6. power gain and drain efficiency as a function of output power; typical values fig 7. adjacent channel power ratio as a function of output power; typical values ddd i0+] * s g% ' * s ' ddd i0+] $&35 g%f ddd 3 / : * s g% ' * s ' ddd 3 / : $&35 g%f
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 9 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.2.2 1-tone pulsed cw v ds = 28 v; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; carrier spacing = 5 mhz. (1) t case = ? 30 ? c (2) t case = +25 ? c (3) t case = +100 ? c fig 8. quiescent drain current as a function of case temperature; typical values fig 9. power gain and drain efficiency as function of output power; typical values ddd 7 fdvh ?& , 't 't , 't p$ p$ p$ , 't 't , 't , 't 't , 't ddd 3 / : * s * s g% g% g% ' ' * s * s ' ' t case = 25 ? c; v ds =28 v; p l(av) = 1.6 w; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; ? =10%; t p =100 ? s. (1) v dd = 24 v (2) v dd = 28 v (3) v dd = 32 v v ds = 28 v; p l(av) = 1.6 w; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; ? =10%; t p = 100 ? s. (1) t case = ? 30 ? c (2) t case = +25 ? c (3) t case = +100 ? c fig 10. power gain as a function of output power; typical values fig 11. power gain as a function of output power; typical values ddd 3 / : * s * s g% g% g% ddd 3 / : * s * s g% g% g%
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 10 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.2.3 2-tone cw t case = 25 ? c; v ds = 28 v; f c = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; tone spacing = 100 khz. fig 12. intermodulation distortion as a function of peak envelope power load power; typical values ddd 3 /3(3 : ,0' ,0' ,0' g%f g%f g%f ,0' ,0' ,0' ,0' ,0' ,0' ,0' ,0' ,0'
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 11 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.3 performance curves (2.3 ghz to 2.4 ghz) performance curves are measured in a class-ab dedicated application circuit with auto-bias from 2.3 ghz to 2.4 ghz. 8.3.1 2-carrier w-cdma v ds = 28 v; i dq1 = 220 ma; i dq2 = 75 ma; carrier spacing = 5mhz. (1) f = 2300 mhz (2) f = 2350 mhz (3) f = 2400 mhz v ds = 28 v; i dq1 = 220 ma; i dq2 = 75 ma; carrier spacing = 5mhz. (1) f = 2300 mhz (2) f = 2350 mhz (3) f = 2400 mhz fig 13. power gain as a function of output power; typical values fig 14. adjacent channel power ratio as a function of output power; typical values ddd 3 / g%p * s * s g% g% g% ddd 3 / g%p $&35 $&35 $&35 g%f g%f g%f
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 12 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.3.2 pulsed cw v ds = 28 v; i dq1 = 220 ma; i dq2 = 75 ma; carrier spacing = 5mhz. (1) f = 2300 mhz (2) f = 2350 mhz (3) f = 2400 mhz fig 15. drain efficiency as a functi on of output power; typical values ddd 3 / g%p ' ' v ds = 28 v; i dq1 = 220 ma; i dq2 = 75 ma; ? =10%; t p = 100 ? s. (1) f = 2300 mhz (2) f = 2350 mhz (3) f = 2400 mhz v ds = 28 v; i dq1 = 220 ma; i dq2 = 75 ma; ? =10%; t p = 100 ? s. (1) f = 2300 mhz (2) f = 2350 mhz (3) f = 2400 mhz fig 16. power gain as a function of output power; typical values fig 17. efficiency as a function of output power; typical values ddd 3 / g%p * s * s g% g% g% ddd 3 / g%p ' '
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 13 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 8.4 application without auto-bias 9. test information 9.1 ruggedness the BLM7G24S-30BG is capable of withstanding a load mismatch corresponding to vswr = 10 : 1 through all phases under the following conditions: v ds =28v; i dq1 =75ma; i dq2 = 233 ma; p l = 27 w (w-cdma); f = 2140 mhz. 9.2 impedance information connect pins 2 and 3; connect pins 5 and 6 at boar d level. the exposed backside of the package is the ground terminal of the device. fig 18. non auto-bias application ddd 9 '6$ qf 9 *66$ qf 9 '66$ 5)b287b$9 '6$ qf qf 5)b,1b$ qf 9 *66$ qf 9 '66$ qf qf qf table 9. typical impedance measured load-pull data. typical values per section unless otherwise specified. f z s [1] z l [1] (mhz) (? ) (? ) 2080 55.62 + j18.89 15.89 ? j2.28 2110 55.61 + j19.04 14.74 ? j2.59 2140 55.60 + j19.12 13.56 ? j2.75 2170 55.57 + j19.25 12.38 ? j2.75 2200 55.53 + j19.39 11.20 ? j2.61 2230 55.48 + j19.55 10.05 ? j2.34 2300 34.51 + j41.45 7.06 ? j6.36
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 14 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic [1] z s and z l defined in figure 19 . 9.3 performance curves 2350 29.26 + j36.91 6.35 ? j6.24 2400 22.86 + j32.52 5.65 ? j6.15 fig 19. definition of transistor impedance table 9. typical impedance ?continued measured load-pull data. typical values per section unless otherwise specified. f z s [1] z l [1] (mhz) (? ) (? ) ddi gudlq = / = 6 jdwh t case = 25 ? c; v ds = 28 v; p l(av) = 1.6 w; f = 2140 mhz; i dq1 = 75 ma; i dq2 = 233 ma; ? =10%; t p =100 ? s. fig 20. one-tone pulsed cw drain efficiency at 1 db gain compression as function of output power at 1 db gain compression; typical values ddd 3 /g% g%p ' '
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 15 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 10. package outline fig 21. package outline sot1212-1 (hsop16) 5hihuhqfhv 2xwolqh yhuvlrq (xurshdq surmhfwlrq ,vvxhgdwh ,(& -('(& -(,7$ 627 vrwbsr 8qlw pp pd[ qrp plq $ 'lphqvlrqvppduhwkhruljlqdoglphqvlrqv 1rwh 3odvwlfruphwdosurwuxvlrqvripppd[lpxpshuvlghduhqrwlqfoxghg +623sodvwlfkhdwvlqnvpdoorxwolqhsdfndjhohdgv 627 $ $ $ $ e e f' ' ' ( ( ( h h h + ( / s 4y z \ pp vfdoh ghwdlo; h ' ( f + ( ( ( ' ' \ % $ y$ ; z% e [ z% e [ $ 4 $ $ $ $ slqlqgh[ ? ? ? h [ / s h
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 16 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 11. handling information 12. abbreviations 13. revision history caution this device is sensitive to electrostatic di scharge (esd). observe precautions for handling electrostatic sensitive devices. such precautions are described in the ansi/esd s20.20 , iec/st 61340-5 , jesd625-a or equivalent standards. table 10. abbreviations acronym description 3gpp 3rd generation partnership project ccdf complementary cumulative distribution function cw continuous waveform dpch dedicated physical channel esd electrostatic discharge fet field-effect transistor gen7 seventh-generation ldmos laterally diffused metal oxide semiconductor mmic monolithic microwave integrated circuit mttf mean time to failure par peak-to-average ratio vswr voltage standing wave ratio w-cdma wideband code division multiple access table 11. revision history document id release date data sheet status change notice supersedes BLM7G24S-30BG v.1 20131104 product data sheet - -
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 17 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 14.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 14.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? 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stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
BLM7G24S-30BG all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 4 november 2013 18 of 19 nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 14.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 15. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors BLM7G24S-30BG ldmos 2-stage power mmic ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 4 november 2013 document identifier: BLM7G24S-30BG please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 16. contents 1 product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 general description . . . . . . . . . . . . . . . . . . . . . 1 1.2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 ordering information . . . . . . . . . . . . . . . . . . . . . 3 4 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 thermal characteristics . . . . . . . . . . . . . . . . . . 4 7 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 application information. . . . . . . . . . . . . . . . . . . 5 8.1 circuit information for application circuit (2.1 ghz to 2.2 ghz) . . . . . . . . . . . . . . . . . . . . 5 8.2 performance curves (2.1 ghz to 2.2 ghz). . . . 8 8.2.1 w-cdma. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.2.2 1-tone pulsed cw . . . . . . . . . . . . . . . . . . . . . . 9 8.2.3 2-tone cw . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8.3 performance curves (2.3 ghz to 2.4 ghz). . . 11 8.3.1 2-carrier w-cdma . . . . . . . . . . . . . . . . . . . . . 11 8.3.2 pulsed cw . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8.4 application without auto-bias . . . . . . . . . . . . . 13 9 test information . . . . . . . . . . . . . . . . . . . . . . . . 13 9.1 ruggedness . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9.2 impedance information . . . . . . . . . . . . . . . . . . 13 9.3 performance curves . . . . . . . . . . . . . . . . . . . . 14 10 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 11 handling information. . . . . . . . . . . . . . . . . . . . 16 12 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 17 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 14.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15 contact information. . . . . . . . . . . . . . . . . . . . . 18 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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